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A Low-Latency Parallel Pipeline CORDIC
Hong-Thu NGUYEN Xuan-Thuan NGUYEN Cong-Kha PHAM | Publication: IEICE TRANSACTIONS on Electronics
Publication Date: 2017/04/01
Vol. E100-C
No. 4
pp. 391-398
Type of Manuscript:
Special Section PAPER (Special Section on Solid-State Circuit Design — Architecture, Circuit, Device and Design Methodology)
Category:
Keyword:
CORDIC, pipeline, low-latency, | | | Summary | Full Text:PDF | |
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Chaotic Behavior in Simple Looped MOS Inverters
Cong-Kha PHAM Mamoru TANAKA Katsufusa SHONO | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1995/03/25
Vol. E78-A
No. 3
pp. 291-299
Type of Manuscript:
Special Section PAPER (Special Section of Selected Papers from the 7th Karuizawa Workshop on Circuits and Systems)
Category: Nonlinear Problems
Keyword:
bifurcation, chaos, chaotic behavior, sigmoid function, inverter, transfer characteristic, nonlinear mapping function, switched capacitor (SC), CMOS switch, hold capacitor, | | | Summary | Full Text:PDF | |
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A Hardware Accelerator for Design-Rule Checking in a Bit-Mapping CAD System
Cong-Kha PHAM Katsufusa SHONO | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1993/10/25
Vol. E76-A
No. 10
pp. 1684-1693
Type of Manuscript:
Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category:
Keyword:
design-rule, raster-based, Manhattan style, bit-mapping CAD, | | | Summary | Full Text:PDF | |
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A CMOS Cell Compiler for a Bit-Mapping CAD System
Cong-Kha PHAM Katsufusa SHONO | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1991/09/25
Vol. E74-A
No. 9
pp. 2603-2611
Type of Manuscript:
PAPER
Category: Computer Aided Design (CAD)
Keyword:
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