IEICE Trans

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IEICE Trans

Chin-Long WEY

Efficient Algorithm and Fast Hardware Implementation for Multiply-by-(1+2^k) Chin-Long WEY Ping-Chang JUI Muh-Tian SHIUE
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2015/04/01 Vol. E98-A No. 4 pp. 966-974 Type of Manuscript: PAPER Category: VLSI Design Technology and CAD Keyword: constant multiplier, ripple carry adder (RCA), carry-lookahead adder (CLA), hybrid adder (HyA), booth algorithm,
	Summary \| Full Text:PDF

Efficient Multiply-by-3 and Divide-by-3 Algorithms and Their Fast Hardware Implementation Chin-Long WEY Ping-Chang JUI Gang-Neng SUNG
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2014/02/01 Vol. E97-A No. 2 pp. 616-623 Type of Manuscript: PAPER Category: VLSI Design Technology and CAD Keyword: ripple carry adder (RCA), carry-lookahead adder (CLA), ripple-borrow subtractor (RBS), multiplier, divider,
	Summary \| Full Text:PDF

Reconfigurable Homogenous Multi-Core FFT Processor Architectures for Hybrid SISO/MIMO OFDM Wireless Communications Chin-Long WEY Shin-Yo LIN Pei-Yun TSAI Ming-Der SHIEH
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2011/07/01 Vol. E94-A No. 7 pp. 1530-1539 Type of Manuscript: PAPER Category: VLSI Design Technology and CAD Keyword: reconfigurable, fast Fourier transform (FFT), homogeneous, SISO/MIMO, orthogonal frequency division multiplexing (OFDM),
	Summary \| Full Text:PDF

A Low-Cost Continuous-Flow Parallel Memory-Based FFT Processor for UWB Applications Chin-Long WEY Shin-Yo LIN Hsu-Sheng WANG Hung-Lieh CHEN Chun-Ming HUANG
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2011/01/01 Vol. E94-A No. 1 pp. 315-323 Type of Manuscript: PAPER Category: VLSI Design Technology and CAD Keyword: fast Fourier transform (FFT), orthogonal frequency division multiplexing (OFDM), ultra-wideband (UWB), continuous flow, parallel architecture,
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Design Methodology for Yield Enhancement of Switched-Capacitor Analog Integrated Circuits Pei-Wen LUO Jwu-E CHEN Chin-Long WEY
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2011/01/01 Vol. E94-A No. 1 pp. 352-361 Type of Manuscript: PAPER Category: VLSI Design Technology and CAD Keyword: yield enhancement, mismatch, common centroid, spatial correlation, process variation, placement optimization,
	Summary \| Full Text:PDF