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IEICE Trans

CheolHong KIM

An Energy-Efficient Partitioned Instruction Cache Architecture for Embedded Processors
CheolHong KIM SungWoo CHUNG ChuShik JHON 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2006/04/01
Vol. E89-D  No. 4  pp. 1450-1458
Type of Manuscript:  PAPER
Category: Computer Systems
Keyword: 
instruction cache, partitioned cache, low power design, dynamic energy, embedded processor, 
 Summary | Full Text:PDF