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Vol.E81-C No.9
pp.1408-1415
Special SectionPAPER
A New Processor Architecture for Digital Signal Transport Systems
Minoru INAMORI, Kenji ISHII, Akihiro TSUTSUI, Kazuhiro SHIRAKAWA, Toshiaki MIYAZAKI, Hiroshi NAKADA, |
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Summary | Full Text:PDF | |
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Vol.E81-C No.9
pp.1416-1423
Special SectionPAPER
Soft-Core Processor Architecture for Embedded System Design
Eko Fajar NURPRASETYO, Akihiko INOUE, Hiroyuki TOMIYAMA, Hiroto YASUURA, |
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Summary | Full Text:PDF | |
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Vol.E81-C No.9
pp.1424-1430
Special SectionPAPER
A Reconfigurable Digital Signal Processor
Boon Keat TAN, Toru OGAWA, Ryuji YOSHIMURA, Kenji TANIGUCHI, |
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Summary | Full Text:PDF | |
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Vol.E81-C No.9
pp.1431-1437
Special SectionPAPER
Plastic Cell Architecture: A Scalable Device Architecture for General-Purpose Reconfigurable Computing
Kouichi NAGAMI, Kiyoshi OGURI, Tsunemichi SHIOZAWA, Hideyuki ITO, Ryusuke KONISHI, |
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Summary | Full Text:PDF | |
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Vol.E81-C No.9
pp.1438-1447
Special SectionPAPER
High Bandwidth, Variable Line-Size Cache Architecture for Merged DRAM/Logic LSIs
Koji INOUE, Koji KAI, Kazuaki MURAKAMI, |
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Summary | Full Text:PDF | |
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Vol.E81-C No.9
pp.1448-1454
Special SectionPAPER
Analyzing and Reducing the Impact of Shorter Data Retention Time on the Performance of Merged DRAM/Logic LSIs
Koji KAI, Akihiko INOUE, Taku OHSAWA, Kazuaki MURAKAMI, |
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Summary | Full Text:PDF | |
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Vol.E81-C No.9
pp.1455-1462
Special SectionPAPER
Evaluating DRAM Refresh Architectures for Merged DRAM/Logic LSIs
Taku OHSAWA, Koji KAI, Kazuaki MURAKAMI, |
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Summary | Full Text:PDF | |
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Vol.E81-C No.9
pp.1463-1472
Special SectionPAPER
Device-Deviation Tolerant Elastic-Vt CMOS Circuits with Fine-Grain Power Control Capability
Masayuki MIZUNO, Hitoshi ABIKO, Koichiro FURUTA, Isami SAKAI, Masakazu YAMASHINA, |
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Summary | Full Text:PDF | |
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Vol.E81-C No.9
pp.1473-1480
Special SectionPAPER
Programmable Power Management Architecture for Power Reduction
Tohru ISHIHARA, Hiroto YASUURA, |
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Summary | Full Text:PDF | |
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Vol.E81-C No.9
pp.1481-1483
Special SectionLETTER
Adaptive Speed Control of a General-Purpose Processor Based on Activities
Sanehiro FURUICHI, Toru AIHARA, |
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Summary | Full Text:PDF | |
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