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Vol.E83-B No.2
pp.422-424
LETTER
Electronic and Radio Applications
Optimum Tilt Angles in Two Dimensional Phased Array Radar Systems
Min Joon LEE, Iickho SONG, Jooshik LEE, Yong Up LEE, |
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Vol.E83-C No.2
pp.129-130
FOREWORD
FOREWORD
Junzo YAMADA, |
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Vol.E83-C No.2
pp.131-142
INVITED PAPER
CMOS RFIC: Application to Wireless Transceiver Design
Kuei-Ann WEN, Wen-Shen WUEN, Guo-Wei HUANG, Liang-Po CHEN, Kuang-Yu CHEN, Shen-Fong LIU, Zhe-Sheng CHEN, Chun-Yen CHANG, |
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Vol.E83-C No.2
pp.143-152
INVITED PAPER
System LSI Design Methods for Low Power LSIs
Hiroto YASUURA, Tohru ISHIHARA, |
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Vol.E83-C No.2
pp.153-160
INVITED PAPER
Approaches for Reducing Power Consumption in VLSI Bus Circuits
Kunihiro ASADA, Makoto IKEDA, Satoshi KOMATSU, |
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Vol.E83-C No.2
pp.161-169
INVITED PAPER
Low Power and Low Voltage MOSFETs with Variable Threshold Voltage Controlled by Back-Bias
Toshiro HIRAMOTO, Makoto TAKAMIYA, |
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Vol.E83-C No.2
pp.170-178
Special SectionPAPER
Three-Layer Cooperative Architecture for MPEG-2 Video Encoder LSI
Mitsuo IKEDA, Toshio KONDO, Koyo NITTA, Kazuhito SUGURI, Takeshi YOSHITOME, Toshihiro MINAMI, Jiro NAGANUMA, Takeshi OGURA, |
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Vol.E83-C No.2
pp.179-185
Special SectionPAPER
A 1.2 V, 30 MIPS, 0.3 mA/MIPS and 200 MIPS, 0.58 mA/MIPS Digital Signal Processors
Hiroshi TAKAHASHI, Shintaro MIZUSHIMA, |
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Vol.E83-C No.2
pp.186-194
Special SectionPAPER
A High-Performance and Low-Power Cache Architecture with Speculative Way-Selection
Koji INOUE, Tohru ISHIHARA, Kazuaki MURAKAMI, |
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Vol.E83-C No.2
pp.195-204
Special SectionPAPER
A Low-Voltage 42.4 G-BPS Single-Ended Read-Modify-Write Bus and Programmable Page-Size on a 3D Frame-Buffer
Kazunari INOUE, Hideaki ABE, Kaori MORI, Shuji FUKAGAWA, |
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