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Vol.E84-A No.2
pp.614-626 PAPER
VLSI Design Technology and CAD Hardware-Software Multi-Level Partitioning for Distributed Embedded Multiprocessor Systems Trong-Yen LEE, Pao-Ann HSIUNG, Sao-Jie CHEN, |
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Vol.E84-A No.2
pp.627-637 PAPER
Numerical Analysis and Optimization Reliability Optimization Design Using a Hybridized Genetic Algorithm with a Neural-Network Technique ChangYoon LEE, Mitsuo GEN, Way KUO, |
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Vol.E84-A No.2
pp.638-646 PAPER
Graphs and Networks A Study of Minimum-Cost Tree Problem with Response-Time Bound in Information Network Norihiko SHINOMIYA, Hiroshi TAMURA, Hitoshi WATANABE, |
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Vol.E84-A No.2
pp.647-652 PAPER
Coding Theory A Dual of Well-Behaving Type Designed Minimum Distance Tomoharu SHIBUYA, Kohichi SAKANIWA, |
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Vol.E84-A No.2
pp.653-659 PAPER
Spread Spectrum Technologies and Applications Throughput Performance of CDMA Slotted ALOHA Systems Based on Average Packet Success Probability Considering Bit-to-Bit Dependence Masato SAITO, Takaya YAMAZATO, Masaaki KATAYAMA, Akira OGAWA, |
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Vol.E84-A No.2
pp.660-667 PAPER
Mobile Information Network and Personal Communications Uncoded Performance Analysis of Coherent MFSK Signals in Wireless Fading Channels Changhwan KIM, Youngyearl HAN, |
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Vol.E84-A No.2
pp.668-674 PAPER
Mobile Information Network and Personal Communications Crash Recovery for Distributed Mobile Computing Systems Tong-Ying Tony JUANG, |
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Vol.E84-A No.2
pp.675-680 LETTER
Digital Signal Processing A Fast Converging RLS Equaliser Tetsuya SHIMAMURA, |
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Vol.E84-A No.2
pp.681-687 LETTER
Systems and Control Normalized Iterative Feedback Tuning with Time Constraints SungEun JO, Sang Woo KIM, Jin Soo LEE, |
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Vol.E84-A No.2
pp.688-692 LETTER
Neural Networks and Bioengineering Design Method of Neural Networks for Limit Cycle Generator by Linear Programming Teru YONEYAMA, Hiroshi NINOMIYA, Hideki ASAI, |
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Current List: 32281 - 32290
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