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IEICE Trans

Keyword : test knowledge

Acceleration of Test Generation for Sequential Circuits Using Knowledge Obtained from Synthesis for Testability
Masato NAKAZATO Satoshi OHTAKE Kewal K. SALUJA Hideo FUJIWARA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2007/01/01
Vol. E90-D  No. 1 ; pp. 296-305
Type of Manuscript:  PAPER
Category: Dependable Computing
Keyword: 
sequential circuit, test generation, synthesis for testability, finite state machine, test knowledge, 
 Summary | Full Text:PDF