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IEICE Trans

Keyword : test algorithms

Theory and Techniques for Testing Check Bits of RAMs with On-Chip ECC
Manoj FRANKLIN Kewal K. SALUJA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 1993/10/25
Vol. E76-D  No. 10 ; pp. 1243-1252
Type of Manuscript:  PAPER
Category: Fault Tolerant Computing
Keyword: 
error-correcting codes, on-chip ECC, pattern sensitive faults, RAM testing, test algorithms, 
 Summary | Full Text:PDF