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IEICE Trans

Keyword : router architecture

A Compression Router for Low-Latency Network-on-Chip
Naoya NIWA Yoshiya SHIKAMA Hideharu AMANO Michihiro KOIBUCHI 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2023/02/01
Vol. E106-D  No. 2 ; pp. 170-180
Type of Manuscript:  PAPER
Category: Computer System
Keyword: 
Network-on-Chips, router architecture, lossy data compression, 
 Summary | Full Text:PDF