Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2024/08/01 Vol. E107-DNo. 8 ;
pp. 940-948 Type of Manuscript: Special Section PAPER (Special Section on Multiple-Valued Logic and VLSI Computing) Category: Keyword: reversible logic circuits, Toffoli gates, lower bound, logic minimization,
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2014/09/01 Vol. E97-DNo. 9 ;
pp. 2253-2261 Type of Manuscript: Special Section PAPER (Special Section on Multiple-Valued Logic and VLSI Computing) Category: Reversible/Quantum Computing Keyword: reversible logic circuits, Toffoli gates, lower bound, logic minimization,