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IEICE Trans

Keyword : processors

Automatic Rectification of Processor Design Bugs Using a Scalable and General Correction Model
Amir Masoud GHAREHBAGHI Masahiro FUJITA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2014/04/01
Vol. E97-D  No. 4 ; pp. 852-863
Type of Manuscript:  PAPER
Category: Dependable Computing
Keyword: 
design error diagnosis, design error correction, micro architecture debugging, formal verification, processors, 
 Summary | Full Text:PDF