NAND Phase Change Memory with Block Erase Architecture and Pass-Transistor Design Requirements for Write and Disturbance Koh JOHGUCHIKasuaki YOSHIOKAKen TAKEUCHI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2011/05/01 Vol. E94-CNo. 5 ;
pp. 676-680 Type of Manuscript: INVITED PAPER (Special Section on Fundamentals and Applications of Advanced Semiconductor Devices) Category: Keyword: memory, phase change memory, PCM, nonvolatile, GST,