Publication: IEICE TRANSACTIONS on Information and Systems
Publication Date: 1993/09/25
Vol. E76-D
No. 9 ;
pp. 1102-1113
Type of Manuscript:
Special Section PAPER (Special Issue on Synthesis and Verification of Hardware Design)
Category: Logic Synthesis
Keyword:
gate resynthesis, sum-to-one subsets, permissible functions, candidate cubes, tautology-checking, |