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IEICE Trans

Keyword : parallel memory architecture

PMA: A High-Performance and Low-Overhead Parallel Memory Architecture Utilizing Three-Dimensional Adaptive Memory Partitioning and Task-Driven Scheduling Method for MCMD-Based CGRA
Danping JIANG Zihang HUANG Yanjiang LIU Zhaoxu ZHOU Xiaoyu SONG Zibin DAI 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2026/09/01
Vol. E109-D  No. 9 ; pp. 1485-1497
Type of Manuscript:  PAPER
Category: Computer System
Keyword: 
coarse-grained reconfigurable architectures, multi-path concurrent processing, multi-task interleaved pipelining, parallel memory architecture, 
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