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IEICE Trans

Keyword : parallel access

Address Computation in Configurable Parallel Memory Architecture
Eero AHO Jarno VANNE Kimmo KUUSILINNA Timo D. HAMALAINEN 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2004/07/01
Vol. E87-D  No. 7 ; pp. 1674-1681
Type of Manuscript:  Special Section PAPER (Special Section on Hardware/Software Support for High Performance Scientific and Engineering Computing)
Category: Networking and System Architectures
Keyword: 
parallel memory, memory access format, skewing schemes, parallel access, 
 Summary | Full Text:PDF