Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1999/06/25 Vol. E82-ANo. 6 ;
pp. 927-938 Type of Manuscript: Special Section PAPER (Special Section of Papers Selected from 1998 International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC '98)) Category: Keyword: superscalar processor, instruction-level parallelism, in-order issue, out-of-order issue, instruction window, reorder buffer, queuing model,