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IEICE Trans

Keyword : high-speed interface

Double-Rate Tomlinson-Harashima Precoding for Multi-Valued Data Transmission
Yosuke IIJIMA Yasushi YUMINAKA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2017/08/01
Vol. E100-D  No. 8 ; pp. 1611-1617
Type of Manuscript:  Special Section PAPER (Special Section on Multiple-Valued Logic and VLSI Computing)
Category: VLSI Architecture
Keyword: 
multi-valued data transmission, equalization, Tomlinson-Harashima precoding, high-speed interface, serial link, 
 Summary | Full Text:PDF
High-Speed Interconnection for VLSI Systems Using Multiple-Valued Signaling with Tomlinson-Harashima Precoding
Yosuke IIJIMA Yuuki TAKADA Yasushi YUMINAKA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2014/09/01
Vol. E97-D  No. 9 ; pp. 2296-2303
Type of Manuscript:  Special Section PAPER (Special Section on Multiple-Valued Logic and VLSI Computing)
Category: Communication for VLSI
Keyword: 
high-speed interface, Tomlinson-Harashima precoding (THP), intersymbol interference, multiple-valued signaling, low-voltage VLSI systems, 
 Summary | Full Text:PDF
Multiple-Valued Data Transmission Based on Time-Domain Pre-Emphasis Techniques
Yasushi YUMINAKA Yasunori TAKAHASHI Kenichi HENMI 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2010/08/01
Vol. E93-D  No. 8 ; pp. 2109-2116
Type of Manuscript:  Special Section PAPER (Special Section on Multiple-Valued Logic and VLSI Computing)
Category: Multiple-Valued VLSI Technology
Keyword: 
pre-emphasis, high-speed interface, multiple-valued logic, equalization, data-dependent jitter, 
 Summary | Full Text:PDF