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IEICE Trans

Keyword : hierarchical testability

Design for Two-Pattern Testability of Controller-Data Path Circuits
Md. ALTAF-UL-AMIN Satoshi OHTAKE Hideo FUJIWARA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2003/06/01
Vol. E86-D  No. 6 ; pp. 1042-1050
Type of Manuscript:  PAPER
Category: Fault Tolerance
Keyword: 
design for testability, hierarchical testability, delay testing, controller-data path circuit, two-pattern testability, 
 Summary | Full Text:PDF
Design for Hierarchical Two-Pattern Testability of Data Paths
Md. Altaf-Ul-AMIN Satoshi OHTAKE Hideo FUJIWARA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2002/06/01
Vol. E85-D  No. 6 ; pp. 975-984
Type of Manuscript:  PAPER
Category: Fault Tolerance
Keyword: 
design for testability, delay testing, hierarchical testability, two-pattern testability, 
 Summary | Full Text:PDF