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IEICE Trans

Keyword : hardware description languages

VHDL, Verilog-HDL, and UDL/I-Feature Description and Analysis
P. N. SANKARSHANAN Hideaki KOBAYASHI Pankaj KUKKAL Hiroyuki KANBARA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 1993/09/25
Vol. E76-D  No. 9 ; pp. 1055-1065
Type of Manuscript:  Special Section PAPER (Special Issue on Synthesis and Verification of Hardware Design)
Category: Hardware Design Languages
Keyword: 
hardware description languages, microprocessor design, VLSI disign, 
 Summary | Full Text:PDF
Verification of Register Transfer Level (RTL) Designs
Alberto Palacios PAWLOVSKY Sachio NAITO 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 1992/11/25
Vol. E75-D  No. 6 ; pp. 785-791
Type of Manuscript:  Special Section PAPER (Special Issue on Pacific Rim International Symposium on Fault Tolerant Systems)
Category: 
Keyword: 
fault analysis, testing, verification, hardware description languages, regular expressions, directed graphs, 
 Summary | Full Text:PDF