Publication: IEICE TRANSACTIONS on Information and Systems
Publication Date: 1997/09/25
Vol. E80-D
No. 9 ;
pp. 863-870
Type of Manuscript:
Special Section PAPER (Special Issue on Architectures, Algorithms and Networks for Massively Parallel Computing)
Category: Interconnection Networks
Keyword:
MIN, coherent cache, directory scheme, multiprocessor, congestion analysis, VLSI implementation, |