Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2017/03/01 Vol. E100-DNo. 3 ;
pp. 452-461 Type of Manuscript: PAPER Category: Fundamentals of Information Systems Keyword: cache optimization, volume rendering, in-place algorithm, GPU, CUDA,
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2016/12/01 Vol. E99-DNo. 12 ;
pp. 3060-3071 Type of Manuscript: PAPER Category: Computer System Keyword: cone beam reconstruction, GPU, CUDA, cache optimization,
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2009/12/01 Vol. E92-ANo. 12 ;
pp. 3238-3247 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Embedded, Real-Time and Reconfigurable Systems Keyword: two-level cache, L1/L2, cache optimization, design space exploration, cache simulation, embedded system,
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2009/06/01 Vol. E92-ANo. 6 ;
pp. 1442-1453 Type of Manuscript: PAPER Category: VLSI Design Technology and CAD Keyword: cache, cache optimization, design space exploration, cache simulation, embedded system,