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IEICE Trans

Keyword : cache affinity

Protocol-Aware Packet Scheduling Algorithm for Multi-Protocol Processing in Multi-Core MPL Architecture
Runzi ZHANG Jinlin WANG Yiqiang SHENG Xiao CHEN Xiaozhou YE 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2017/12/01
Vol. E100-D  No. 12 ; pp. 2837-2846
Type of Manuscript:  Special Section PAPER (Special Section on Parallel and Distributed Computing and Networking)
Category: Architecture
Keyword: 
multi-core, packet scheduling, cache affinity, modified pipelining, 
 Summary | Full Text:PDF