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IEICE Trans

Keyword : built-in self-testing (BIST)

A Method and the Effect of Shuffling Compactor Inputs in VLSI Self-Testing
Kiyoshi FURUYA Edward J. McCLUSKEY 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 1992/11/25
Vol. E75-D  No. 6 ; pp. 842-846
Type of Manuscript:  Special Section PAPER (Special Issue on Pacific Rim International Symposium on Fault Tolerant Systems)
Category: 
Keyword: 
built-in self-testing (BIST), spot error, signature analysis, aliasing, shuffling, 
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