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IEICE Trans

Keyword : architecture level optimization

A Novel Hardware Architecture of Intra-Predictor Generator for H.264/AVC Codec
Sanghoon KWAK Jinwook KIM Dongsoo HAR 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2008/07/01
Vol. E91-D  No. 7 ; pp. 2083-2086
Type of Manuscript:  LETTER
Category: Image Processing and Video Processing
Keyword: 
H.264/AVC, intra predictor, hardware implementation, architecture level optimization, 
 Summary | Full Text:PDF