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IEICE Trans

Keyword : SDI model

Verification of Scalable-Delay-Insensitive Asynchronous Circuits
Atsushi YAMAZAKI Hiroshi RYU Tomohiro YONEDA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 1999/03/25
Vol. E82-D  No. 3 ; pp. 701-703
Type of Manuscript:  LETTER
Category: Fault Tolerant Computing
Keyword: 
formal verification, asynchronous circuit, SDI model, bounded delay model, 
 Summary | Full Text:PDF