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IEICE Trans

Keyword : RTL simulation

Evaluation of Side-Channel Leakage Simulation by Using EMC Macro-Model of Cryptographic Devices
Yusuke YANO Kengo IOKIBE Toshiaki TESHIMA Yoshitaka TOYOTA Toshihiro KATASHITA Yohei HORI 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 2021/02/01
Vol. E104-B  No. 2 ; pp. 178-186
Type of Manuscript:  PAPER
Category: Electromagnetic Compatibility(EMC)
Keyword: 
side-channel attack, dynamic current consumption simulation, EMC macro-model, RTL simulation, FPGA, cryptographic device, 
 Summary | Full Text:PDF
ArchHDL: A Novel Hardware RTL Modeling and High-Speed Simulation Environment
Shimpei SATO Ryohei KOBAYASHI Kenji KISE 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2018/02/01
Vol. E101-D  No. 2 ; pp. 344-353
Type of Manuscript:  Special Section PAPER (Special Section on Reconfigurable Systems)
Category: Design Methodology and Platform
Keyword: 
hardware description language, RTL modeling, RTL simulation, 
 Summary | Full Text:PDF