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IEICE Trans

Keyword : Network on Chip

Energy- and Traffic-Balance-Aware Mapping Algorithm for Network-on-Chip
Zhi DENG Huaxi GU Yingtang YANG Hua YOU 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2013/03/01
Vol. E96-D  No. 3 ; pp. 719-722
Type of Manuscript:  LETTER
Category: Computer System
Keyword: 
Network on Chip, mapping algorithm, multi-objective optimization, energy consumption, 
 Summary | Full Text:PDF
Design of an Area-Efficient and Low-Power Hierarchical NoC Architecture Based on Circuit Switching
Woo Joo KIM Sung Hee LEE Sun Young HWANG 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2009/03/01
Vol. E92-A  No. 3 ; pp. 890-899
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
Network on Chip, central routing, circuit switching, low-power switch, hierarchical topology, 
 Summary | Full Text:PDF