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IEICE Trans

Keyword : IEEE rounding

Floating Point Adder/Subtractor Performing IEEE Rounding and Addition/Subtraction in Parallel
Woo-Chan PARK Shi-Wha LEE Oh-Young KWON Tack-Don HAN Shin-Dug KIM 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 1996/04/25
Vol. E79-D  No. 4 ; pp. 297-305
Type of Manuscript:  PAPER
Category: Computer Hardware and Design
Keyword: 
FPU (Floating Point Unit), floating point adder/subtractor, IEEE rounding, carry select adder, 
 Summary | Full Text:PDF