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IEICE Trans

Keyword : yield estimation

Development of an Enterprise-Wide Yield Management System Using Critical Area Analysis for High-Product-Mix Semiconductor Manufacturing
Yuichi HAMAMURA Chizu MATSUMOTO Yoshiyuki TSUNODA Koji KAMODA Yoshio IWATA Kenji KANAMITSU Daisuke FUJIKI Fujihiko KOJIKA Hiromi FUJITA Yasuo NAKAGAWA Shun'ichi KANEKO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2009/01/01
Vol. E92-C  No. 1 ; pp. 144-152
Type of Manuscript:  PAPER
Category: Semiconductor Materials and Devices
Keyword: 
defects, failure analysis, yield estimation, integrated circuit layout, simulation, 
 Summary | Full Text:PDF
Statistical Modeling of a Via Distribution for Yield Estimation
Takumi UEZONO Kenichi OKADA Kazuya MASU 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2006/12/01
Vol. E89-A  No. 12 ; pp. 3579-3584
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Interconnect
Keyword: 
via distribution, yield estimation, wire length distribution, 
 Summary | Full Text:PDF