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IEICE Trans

Keyword : tunnel transistor

Multiple-Valued T-Gate Based on Multiple Junction Surface Tunnel Transistor
Tetsuya UEMURA Toshio BABA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2002/07/01
Vol. E85-C  No. 7 ; pp. 1486-1490
Type of Manuscript:  PAPER
Category: Semiconductor Materials and Devices
Keyword: 
multiple-valued logic, T-gate, flip flop, tunnel transistor, NDR, 
 Summary | Full Text:PDF
Surface Tunnel Transistors with Multiple Interband Tunnel Junctions
Toshio BABA Tetsuya UEMURA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1997/07/25
Vol. E80-C  No. 7 ; pp. 875-880
Type of Manuscript:  Special Section PAPER (Special Issue on New Concept Device and Novel Architecture LSIs)
Category: Quantum Devices
Keyword: 
tunnel transistor, interband tunneling, negative differential resistance, functional circuit, multiple value, 
 Summary | Full Text:PDF
Characterization for Negative Differential Resistance in Surface Tunnel Transistors
Tetsuya UEMURA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1994/09/25
Vol. E77-C  No. 9 ; pp. 1444-1449
Type of Manuscript:  Special Section PAPER (Special Issue on Heterostructure Devices and Epitaxial Growth Techniques)
Category: 
Keyword: 
tunnel transistor, interband tunneling, negative differential resistance, bistable circuit, trap-assisted tunneling, 
 Summary | Full Text:PDF