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IEICE Trans

Keyword : time-mode circuit

A Gate Delay Mismatch Tolerant Time-Mode Analog Accumulator Using a Delay Line Ring
Tomohiko YANO Toru NAKURA Tetsuya IIZUKA Kunihiro ASADA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2017/09/01
Vol. E100-C  No. 9 ; pp. 736-745
Type of Manuscript:  PAPER
Category: Electronic Circuits
Keyword: 
time-mode circuit, analog front end, integrator, accumulator, time domain, calibration free, 
 Summary | Full Text:PDF