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IEICE Trans

Keyword : time domain processing

A 500 MHz-BW -52.5 dB-THD Voltage-to-Time Converter Utilizing Two-Step Transition Inverter Delay Lines in 28 nm CMOS
Takuji MIKI Noriyuki MIURA Kento MIZUTA Shiro DOSHO Makoto NAGATA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2017/06/01
Vol. E100-C  No. 6 ; pp. 560-567
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuits and Their Application Technologies)
Category: 
Keyword: 
Voltage-to-Time converter (VTC), time domain processing, CMOS, two-step transition, trip voltage, 
 Summary | Full Text:PDF