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IEICE Trans

Keyword : super-CMOS

A 5.8 ns 256 kb SRAM with 0.4 µm Super-CMOS Process Technology
Kunihiko KOZARU Atsushi KINOSHITA Tomohisa WADA Yutaka ARITA Michihiro YAMADA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1997/04/25
Vol. E80-C  No. 4 ; pp. 566-572
Type of Manuscript:  Special Section PAPER (Special Issue on Circuit Technologies for Memory and Analog LSIs)
Category: 
Keyword: 
super-CMOS, high-speed SRAM, reference voltage generator, voltage down converter, 
 Summary | Full Text:PDF