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IEICE Trans

Keyword : static-noise margin

Development of a Low Standby Power Six-Transistor CMOS SRAM Employing a Single Power Supply
Nobuaki KOBAYASHI Tadayoshi ENOMOTO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2018/10/01
Vol. E101-C  No. 10 ; pp. 822-830
Type of Manuscript:  PAPER
Category: Electronic Circuits
Keyword: 
CMOS, SRAM, static-noise margin, standby power dissipation, leakage current, Self-controllable Voltage Level (SVL) circuit, 
 Summary | Full Text:PDF