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IEICE Trans

Keyword : static noise margin

Short Term Cell-Flipping Technique for Mitigating SNM Degradation Due to NBTI
Yuji KUNITAKE Toshinori SATO Hiroto YASUURA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2011/04/01
Vol. E94-C  No. 4 ; pp. 520-529
Type of Manuscript:  Special Section PAPER (Special Section on Circuits and Design Techniques for Advanced Large Scale Integration)
Category: 
Keyword: 
NBTI, SRAM, static noise margin, stress probability, register file, cache memory, 
 Summary | Full Text:PDF
Analytical Model of Static Noise Margin in CMOS SRAM for Variation Consideration
Hirofumi SHINOHARA Koji NII Hidetoshi ONODERA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2008/09/01
Vol. E91-C  No. 9 ; pp. 1488-1500
Type of Manuscript:  PAPER
Category: Electronic Circuits
Keyword: 
SRAM, memory cell, static noise margin, SNM, variability, 
 Summary | Full Text:PDF