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IEICE Trans

Keyword : single chip

Logic and Analog Test Schemes for a Single-Chip Pixel-Parallel Fingerprint Identification LSI
Satoshi SHIGEMATSU Hiroki MORIMURA Toshishige SHIMAMURA Takahiro HATANO Namiko IKEDA Yukio OKAZAKI Katsuyuki MACHIDA Mamoru NAKANISHI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2007/10/01
Vol. E90-C  No. 10 ; pp. 1892-1899
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Technology toward Frontiers of New Market)
Category: Image Sensor/Vision Chip
Keyword: 
test, pixel parallel, sensor, fingerprint identification, single chip, high-functional device, MEMS, 
 Summary | Full Text:PDF