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IEICE Trans

Keyword : register cache

Design of a Register Cache System with an Open Source Process Design Kit for 45nm Technology
Junji YAMADA Ushio JIMBO Ryota SHIOYA Masahiro GOSHIMA Shuichi SAKAI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2017/03/01
Vol. E100-C  No. 3 ; pp. 232-244
Type of Manuscript:  Special Section PAPER (Special Section on Low-Power and High-Speed Chips)
Category: 
Keyword: 
register file, register cache, digital design, freePDK, 
 Summary | Full Text:PDF