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IEICE Trans

Keyword : reconfigurable computing architecture

A Cost Effective Interconnection Network for Reconfigurable Computing Processor in Digital Signal Processing Applications
Yeong-Kang LAI Lien-Fei CHEN Jian-Chou CHEN Chun-Wei CHIU 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2006/11/01
Vol. E89-C  No. 11 ; pp. 1674-1675
Type of Manuscript:  Special Section LETTER (Special Section on Novel Device Architectures and System Integration Technologies)
Category: 
Keyword: 
interconnection, digital signal processing, reconfigurable computing architecture, 
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