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IEICE Trans

Keyword : recessed gate process

High Speed GaAs Digital Integrated Circuits
Masahiro AKIYAMA Seiji NISHI Yasushi KAWAKAMI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1995/09/25
Vol. E78-C  No. 9 ; pp. 1165-1170
Type of Manuscript:  INVITED PAPER (Special Issue on Ultra-High-Speed Electron Devices)
Category: 
Keyword: 
GaAs digital IC, DCFL, SBFL, high speed, low power, self-alignment process, recessed gate process, circuit design, standard cell, 
 Summary | Full Text:PDF