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IEICE Trans

Keyword : pixel parallel processing

Vision Chip Architecture for Detecting Line of Sight Including Saccade
Junichi AKITA Hiroaki TAKAGI Takeshi NAGASAKI Masashi TODA Toshio KAWASHIMA Akio KITAGAWA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2006/11/01
Vol. E89-C  No. 11 ; pp. 1605-1611
Type of Manuscript:  Special Section PAPER (Special Section on Novel Device Architectures and System Integration Technologies)
Category: 
Keyword: 
vision chip, line of sight, saccade, pixel parallel processing, automata, 
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