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IEICE Trans

Keyword : inversion-layer-bit-line

A 126 mm2 4-Gb Multilevel AG-AND Flash Memory with Inversion-Layer-Bit-Line Technology
Hideaki KURATA Satoshi NODA Yoshitaka SASAGO Kazuo OTSUGA Tsuyoshi ARIGANE Tetsufumi KAWAMURA Takashi KOBAYASHI Hitoshi KUME Kazuki HOMMA Teruhiko ITO Yoshinori SAKAMOTO Masahiro SHIMIZU Yoshinori IKEDA Osamu TSUCHIYA Kazunori FURUSAWA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2007/11/01
Vol. E90-C  No. 11 ; pp. 2146-2156
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
flash memory, multilevel, inversion-layer-bit-line, AG-AND, 
 Summary | Full Text:PDF