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IEICE Trans

Keyword : gate charge

A Novel Power MOSFET Structure with Shallow Junction Dual Well Design
Chien-Nan LIAO Feng-Tso CHIEN Chi-Ling WANG Hsien-Chin CHIU Yi-Jen CHAN 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2007/05/01
Vol. E90-C  No. 5 ; pp. 937-942
Type of Manuscript:  Special Section PAPER (Special Section on Fundamentals and Applications of Advanced Semiconductor Devices)
Category: Compound Semiconductor and Power Devices
Keyword: 
power VDMOSFET, shallow dual well, gate charge, avalanche breakdown, 
 Summary | Full Text:PDF