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IEICE Trans

Keyword : floating-point execution

A Floating-Point Divider Using Redundant Binary Circuits and an Asynchronous Clock Scheme
Hiroaki SUZUKI Hiroshi MAKINO Koichiro MASHIKO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1999/01/25
Vol. E82-C  No. 1 ; pp. 105-110
Type of Manuscript:  PAPER
Category: Electronic Circuits
Keyword: 
divider, floating-point execution, redundant binary circuits, asynchronous circuit, self-timed circuit, 
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