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IEICE Trans

Keyword : device fluctuation

Fully Self-Timing Data-Bus Architecture for 64-Mb DRAMs
Tadaaki YAMAUCHI Koji TANAKA Kiyohiro FURUTANI Yoshikazu MOROOKA Hiroshi MIYAMOTO Hideyuki OZAKI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1995/07/25
Vol. E78-C  No. 7 ; pp. 858-865
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
self-timing data-bus, timing delay, device fluctuation, amplifier, 64-Mb DRAMs, 
 Summary | Full Text:PDF