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IEICE Trans

Keyword : current-mode logic (CML)

A Multiple-Valued Reconfigurable VLSI Architecture Using Binary-Controlled Differential-Pair Circuits
Xu BAI Michitaka KAMEYAMA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2013/08/01
Vol. E96-C  No. 8 ; pp. 1083-1093
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
fine-grain reconfigurable VLSI architecture, multiple-valued switch block, binary-controlled current-steering technique, current-source sharing technique, current-mode logic (CML), 
 Summary | Full Text:PDF