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IEICE Trans

Keyword : conditional sum adder

64-Bit High-Performance Power-Aware Conditional Carry Adder Design
Kuo-Hsing CHENG Shun-Wen CHENG 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2005/06/01
Vol. E88-C  No. 6 ; pp. 1322-1331
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
conditional sum adder, conditional carry adder, power-aware, hybrid dual-threshold voltage, CMOS design, 
 Summary | Full Text:PDF