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IEICE Trans

Keyword : clock data recovery

A Fully-Synthesizable 10.06Gbps 16.1mW Injection-Locked CDR in 28nm FDSOI
Aravind THARAYIL NARAYANAN Wei DENG Dongsheng YANG Rui WU Kenichi OKADA Akira MATSUZAWA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2017/03/01
Vol. E100-C  No. 3 ; pp. 259-267
Type of Manuscript:  Special Section PAPER (Special Section on Low-Power and High-Speed Chips)
Category: 
Keyword: 
fully-synthesizable, all-digital, clock data recovery, injection locking, phase-filtering, 
 Summary | Full Text:PDF
A Study on Fully Digital Clock Data Recovery Utilizing Time to Digital Converter
Philipus Chandra OH Akira MATSUZAWA Win CHAIVIPAS 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2007/06/01
Vol. E90-C  No. 6 ; pp. 1311-1314
Type of Manuscript:  Special Section LETTER (Special Section on Analog Circuits and Related SoC Integration Technologies)
Category: 
Keyword: 
clock data recovery, time to digital converter, phase locked loop, 
 Summary | Full Text:PDF