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IEICE Trans

Keyword : binary-coded ternary signal

New Design Methodology and New Differential Logic Circuits for the Implementation of Ternary Logic Systems in CMOS VLSI without Process Modification
Hong-Yi HUANG Chung-Yu WU 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1994/06/25
Vol. E77-C  No. 6 ; pp. 960-969
Type of Manuscript:  PAPER
Category: Electronic Circuits
Keyword: 
ternary logic system, CMOS dynamic logic circuit, binary-coded ternary signal, redundant binary adder, 
 Summary | Full Text:PDF