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IEICE Trans

Keyword : approximate adder

Signed Approximate Adder Tree and Quantization- and Bit-Pruning-Aware Training for Digital Computation-in-Memory
Daqi LIN Tao WANG Adil PADIYAL Naoko MISAWA Chihiro MATSUI Ken TAKEUCHI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2025/09/01
Vol. E108-C  No. 9 ; pp. 418-426
Type of Manuscript:  Special Section PAPER (Special Section on Fundamentals and Applications of Advanced Semiconductor Devices)
Category: 
Keyword: 
digital Computation-in-Memory, SRAM, approximate adder, quantization- and bit-pruning-aware training, 
 Summary | Full Text:PDF
Trading Accuracy for Power with a Configurable Approximate Adder
Toshinori SATO Tongxin YANG Tomoaki UKEZONO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2019/04/01
Vol. E102-C  No. 4 ; pp. 260-268
Type of Manuscript:  Special Section PAPER (Special Section on Solid-State Circuit Design — Architecture, Circuit, Device and Design Methodology)
Category: 
Keyword: 
approximate computing, low-power circuit, approximate adder, 
 Summary | Full Text:PDF