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IEICE Trans

Keyword : SDRAM I/O interface

A Decision Feedback Equalizing Receiver for the SSTL SDRAM Interface with Clock-Data Skew Compensation
Young-Soo SOHN Seung-Jun BAE Hong-June PARK Soo-In CHO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2004/05/01
Vol. E87-C  No. 5 ; pp. 809-817
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
SDRAM I/O interface, receiver equalization, SSTL, decision feedback equalization, clock-data skew compensation, X2 over-sampling phase detector, 
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